1. Field of the Invention
The instant disclosure relates to a semiconductor package process, in particular, to a fan-out wafer level chip package structure and manufacturing method thereof.
2. Description of Related Art
As the development of portable or wearable electronic devices increases, multi-function products having small size, high efficiency, high operating speed, and high quality need to be developed to meet the recent trend. To minimize shape and size of the consumer electronic devices, wafer level chip scale packaging processes are usually used to encapsulate the chip.
In conventional packaging process, the wafer is cut to separate IC chips from each other and then IC chips are individually packaged. The difference between the wafer level chip scale packaging process and the conventional packaging process is that the whole wafer is directly packaged in wafer level chip scale packaging process so that all of IC chips fabricated on the wafer can be packaged in the same process. After the wafer level chip scale packaging process, the size of the product is equal to or slightly larger than that of the power semiconductor chip. However, the wafer level chip scale packaging process limits the variability of the fan-out layout. Accordingly, a fan-out wafer level packaging process (Fan-out WLP) has been developed in today's industry to provide more variation in layout design so as to simplify the process of adhering the packaged IC chip to the surface of a printed circuit board and improve yield.
Granted U.S. Pat. No. 7,759,163 discloses a semiconductor module and a method of manufacturing the same. Firstly, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material to form a molded body. The molded body is thinned until the at least two semiconductor chips are exposed. Then, the carrier is removed from the at least two semiconductor chips. The at least two semiconductor chips are singulated. However, a residue of the molding material may be easily left on the surface of the semiconductor chips during the processes of forming the molded body and then thinning the molded body. In addition, if the two semiconductor chips have different heights, the active surfaces of the two semiconductor chips may be damaged during the thinning process. Furthermore, the processes of generating channels by drilling the molded body and filling the conductive material so that the back electrodes of the two semiconductor chips can extend to the active surfaces of the two semiconductor chips are too complex.